VMEbus Bus Grant and Interrupt Acknowledge
This chart shows how the Bus Grant In/Out and Interrupt Acknowledge In/Out
signals are connected on the board. Wired signals are not used. Open signals are
selected with backplane jumpers. Option signals are enabled on the board and on
the backplane.
| DESCRIPTION |
BG0 |
BG1 |
BG2 |
BG3 |
IACK |
| 4100 CPU |
Wired |
Wired |
Wired |
Open |
Wired |
| 4200 CPU |
Wired |
Wired |
Wired |
Open |
Wired |
| 4300 CPU |
Wired |
Wired |
Wired |
Open |
Open |
| 4400 CPU |
Wired |
Wired |
Wired |
Open |
Wired |
| 600MP CPU |
Wired |
Wired |
Wired |
Open |
Open |
| CG2 Color |
Wired |
Wired |
Wired |
Wired |
Open |
| CG3 Color |
Wired |
Wired |
Wired |
Wired |
Open |
| CG5 Color |
Wired |
Wired |
Wired |
Wired |
Open |
| CG9 Color |
Wired |
Wired |
Wired |
Wired |
Open |
| GB |
Wired |
Wired |
Wired |
Wired |
Wired |
| GP & GP+ |
Wired |
Wired |
Wired |
Open |
Open |
| GP2 |
Wired |
Wired |
Wired |
Wired |
Wired |
| TAAC-1 |
Wired |
Wired |
Wired |
Wired |
Open |
| VX |
Open |
Open |
Open |
Open |
Open |
| MVX |
Wired |
Wired |
Wired |
Open |
Open |
| 3/E Mono |
Wired |
Wired |
Wired |
Wired |
Wired |
| 3/E Color |
Wired |
Wired |
Wired |
Wired |
Wired |
| VME-Multibus |
Wired |
Wired |
Wired |
Open |
Open |
| Xylogics 7053 |
Option |
Option |
Option |
Option |
Open |
| ISP-80 IPI-2 |
Open |
Open |
Open |
Open |
Open |
| Prestoserve |
Wired |
Wired |
Wired |
Wired |
Wired |
| ALM-2 |
Wired |
Wired |
Wired |
Wired |
Open |
| MCP |
Wired |
Wired |
Wired |
Wired |
Open |
| HSI |
Wired |
Wired |
Wired |
Wired |
Open |
| Channel Adapter |
Option |
Option |
Option |
Option |
|
| FDDI |
Wired |
Open |
Open |
Open |
Open |
| SCSI-2 |
Option |
Option |
Option |
Option |
Open |
| SCSI-3 |
Wired |
Wired |
Wired |
Open |
Open |
| 3/E SCSI |
Wired |
Wired |
Wired |
Wired |
Open |
| IPC |
Open |
Open |
Open |
Open |
Open |
Last updated: December 2, 1996
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